/*
 * system-ss805x.h
 *
 * system driver for SS805X.
 *
 * Copyright (C) 2024 Sinh Micro, Inc.
 * Subject to the GNU Public License, version 2.
 *
 * Author: lixiang<lixiang@sinhmicro.com>
 * 
 * Encoding format: GB2312
 * Version: v1.2.2
 * Date: 2024-11-05
 */

#ifndef __SYSTEM_SS805X_H__
#define __SYSTEM_SS805X_H__

/*
 * please realize these APIs or Macro as below:
 * 1. the frequency of clock source : HIRC, LORC
 *    SYS_LORC_FREQ
 *    SYS_HIRC_FREQ
 *
 * 2. the frequency of system clock before frequency division : SYS_PRE_SCLK_FREQ
 *    SYS_PRE_SCLK_FREQ
 *
 * 3. the frequency of system clock after frequency division(SYS_PRE_SCLK_FREQ / CONFIG_SYS_SCLK_DIV) : SYS_SCLK_FREQ
 *    SYS_SCLK_FREQ
 *
 * 4. enable/disable interrupt enable :
 *    SYS_IRQ_ENABLE()
 *    SYS_IRQ_DISABLE()
 *
 * 5. the system enter sleep mode :
 *    SYS_ENTER_SLEEP()
 *
 * 6. reset the wdog :
 *    SYS_WDOG_KEEP_ALIVE()
 *  
 */ 

#define SYS_LORC_FREQ                           (32000ul)
#define SYS_HIRC_FREQ                           (12000000ul)
#define SYS_PLLCLK_FREQ                         (0)

#if (CONFIG_SYS_SCLK_SRC == 0)
    #define SYS_PRE_SCLK_FREQ                   (SYS_LORC_FREQ)
#elif (CONFIG_SYS_SCLK_SRC == 1)
    #define SYS_PRE_SCLK_FREQ                   (SYS_HIRC_FREQ)
#else
    #error("invalid CONFIG_SYS_SCLK_SRC")
#endif

#define SYS_SCLK_FREQ                           (SYS_PRE_SCLK_FREQ / CONFIG_SYS_SCLK_DIV)

#define SYS_IRQ_ENABLE()                        do { EA = 1; } while (0)
#define SYS_IRQ_DISABLE()                       do { EA = 0; } while (0)

#define SYS_ENTER_SLEEP()                       do { PCON1 |= 0x01; } while (0)

#define CPU_IDLE()                              (PCON |= 0x01)

#define SYS_WDOG_KEEP_ALIVE()               		do { WDTCON |= 0x80; } while (0)

#endif